1. Field of the Invention
The present invention relates to a recording head driving device which serves as a printing unit for printing characters or the like on a recording medium, and more specifically to a recording head driving device for driving a recording head such as a thermal head or the like used for printing of a facsimile system, a printer, etc.
2. Description of the Prior Art
FIG. 1 is a circuit diagram showing a conventional one-dot type thermal head driving circuit which has been illustrated in a catalogue (as entitled "Thermal Head, H-C9683-E" described in P25 and issued on Feb., 1991) produced by Mitsubishi Electric Corp. Thermal heads are arranged in such a manner that the thermal head driving circuit is provided with a predetermined number of dots. In the same drawing, reference numeral 1 indicates a shift register for shifting input data on the present line in accordance with a clock. The shift register 1 has steps corresponding to the number of dots relative to the thermal heads.
Designated at numeral 21 is a latch circuit for taking in data which appears at a tap of the shift register 1 so as to retain or hold it therein. Reference numeral 31 indicates a gate signal generating unit for generating three gate signals GA, GB, GC. Designated at numerals 4a, 4b are reverse logical product (hereafter called "NAND") gates serving as gate circuits supplied with latch outputs Q2, Q3 from the latch circuit 21 and gate signals GB, GC from the gate signal generating unit 31.
Reference numeral 51 indicates a logical product (hereafter called "AND") gate serving as a gate circuit supplied with the outputs of the NAND gates 4a, 4b, the Q1 output of the latch circuit 21 and the gate signal GA of the gate signal generating unit 31 so as to output a pulse signal indicative of a conductible or energizable state therefrom. Designated at numeral 6 is a darlington transistor serving as a drive circuit for driving or energizing a thermal or heating resistor 7 of a thermal head in response to the pulse signal output from the AND gate 51.
The operation of the thermal head driving circuit will now be described below. FIG. 2 is a timing chart for describing the relationship in time among respective signals.
The shift register 1 first takes in data shown in FIG. 2(B) as an image signal in response to a clock signal shown in FIG. 2(A) and shifts it to a desired location. The latch circuit 21 successively takes in data from the tap of the shift register 1 corresponding to a dot thereof in response to a latch signal shown in FIG. 2(C).
At this time, the latch circuit 21 brings data from the shift register 1 in response to the input latch signal and shifts the latched data one stage. As a result, data on the previous line relative to the dot appears at the Q2 terminal of the latch circuit 21, whereas data on the line prior to the previous line relative to the dot appears at the Q3 terminal.
On the other hand, the gate signal generating unit 31 generates the gate signals GA, GB, GC represented in the form of given patterns as illustrated in FIGS. 2(D), 2(E) and 2(F). The pulse signal to be sent to the heating resistor 7 is determined by the gate signals GA, GB, GC, the outputs Q1, Q2, Q3 of the latch circuit 21, the NAND gates 4a, 4b and the AND gate 51.
The darlington transistor 6 drives the heating resistor 7 in response to the signal delivered from the AND gate 51 so as to cause the heating resistor 7 to generate heat in proportion to the amount of current which flows into the heating resistor 7 driven by the darlington transistor 6, thereby subjecting a thermal recording paper or the like located on the heating resistor 7 to colour development.
A description will now be made of history control of the amount of current supplied to the heating resistor 7. When the time required for the darlington transistor 6 to cause the heating resistor 7 to conduct current, i.e., energize the heating resistor 7 as shown in FIG. 3(A) is 1 ms, the temperature of the heating resistor 7 reaches 300.degree. C. When, on the other hand, the energization of the heating resistor 7 is repeated in a period corresponding to 2 ms as shown in FIG. 3(B), the heating resistor 7 increases up to a temperature of 500.degree. C.
Thus, even if the same amount of current is provided, the temperature of the heating resistor 7 at the time of completion of the energization thereof is also high when the temperature of the heating resistor 7 at the start of the energization thereof is high. That is, a color-developed density becomes high upon energization of the heating resistor 7 in a quick repeating cycle unless the energy supplied to the heating resistor 7 is controlled.
It is therefore necessary to control the amount of energy depending on the temperature of the heating resistor at the start of its energization. More specifically, the control for the energization of the heating resistor is performed based on a decision made as to whether or not desired data has been recorded at the line prior to the previous line.
This history control is carried out in the following manner. That is, it is necessary to recognize the degree of an increase in temperature with respect to each of patterns (recorded conditions of dots at the present line, the previous line and the line prior to the previous line) in order to determine in what manner the energy should be supplied to a dot at the present line judging from the recorded conditions of the dots at the previous line and the line prior to the previous line, i.e., the energization with respect to its dot should be done.
FIG. 4 is a simplified graph showing the result of simulated increases in temperature with respect to the respective patterns upon non-performance of the history control. In the same drawing, "H" represents that the recording (energization) of dots has been made, whereas "L" represents that the recording (energization) of the dots has not been done. For example, FIG. 4(B) shows that the recording of the dot has been made at the line prior to the previous line and the recording of the dot has not been made at the previous line.
In addition, values (each of which represents the degree of an increase in temperature, but is now called a point number) obtained by normalizing respective temperatures at the time that the energization has been completed at the present line, are shown in FIG. 4. It is understood that the history control should be done in such a manner as to provide large energy because the point number is low as regards "1.0" [see FIG. 4(A)]. Also, a small amount of energy should be provided when the point number is as high as "3.0" as is shown in FIG. 4(D).
FIG. 5 is a view showing the relationship between the point numbers shown in FIG. 4 and the data Q1, Q2, Q3 latched in the latch circuit 21.
As has already been described above, the latch data Q1, Q2, Q3 respectively represent criterion made as to whether or not the dots are recorded at the line prior to the previous line, the previous line and the present line. Now, the number of levels is defined depending on the number of "H". The more the number of "H" produced in a pattern increases, the more the number of levels becomes high. The most suitable energized states corresponding to four kinds of patterns shown in FIG. 5 are represented by FIGS. 2(G) to 2(J).
In order to establish a suitable current amount corresponding to the point numbers, the gate signal generating unit 31 generates the gate signals GA, GB and GC shown in FIGS. 2(D), 2(E) and 2(F). As a result, the outputs of the AND gate 51 corresponding to the output patterns of the latch circuit 21 are represented by FIGS. 2(G) to 2(J), and hence the amount of current associated with the point numbers is set.
That is, the pattern (L, L, H) representative of the low point number is controlled in such a manner that the amount of current increases. The patterns indicative of the large point numbers are controlled such that the amount of current is reduced.
Incidentally, the pulse widths of the gate signals GB, GC are identical to each other. In the case of two patterns in the same level, i.e., in the level 2, the energizing time at one of the two patterns and that at the other thereof are identical in total to each other.
Incidentally, techniques related to the conventional thermal head driving circuit have been disclosed as references in Japanese Patent Application Laid-Open Nos. 63-203346, 64-32973 and 64-67365, for example.
The conventional thermal head driving circuit has been constructed as described above. It is therefore necessary to increase the number of the outputs of the latch circuit 21 when the history control is strictly performed. Thus, the number of patterns to be controlled increases, thereby causing a difficulty in suitably controlling the patterns. Further, when the respective heating resistors provided adjacent to one another are independently controlled, no attention has been paid to the influence of storage of heat generated between the adjacent respective heating resistors. Accordingly, the control of heat history cannot be performed with high accuracy.